Node:Rule Introduction, Next:A simple makefile, Previous:Writing a makefile, Up:Writing a makefile
A simple makefile consists of "rules" with the following shape:
target ... : prerequisites ...
command
...
...
A target is usually the name of a file that is generated by a
program; examples of targets are executable or object files. A target
can also be the name of an action to carry out, such as clean.
A prerequisite is a file that is used as input to create the target. A target often depends on several files.
A command is an action that make carries out. A rule may
have more than one command, each on its own line. Please note:
you need to put a tab character at the beginning of every command line!
This is a common mistake that even experienced makefile writers can
make.
Usually a command is defined by a rule with prerequisites and serves to
create a target file if any of the prerequisites change. However, the
rule that specifies commands for the target need not have prerequisites.
For example, the rule containing the delete command associated with the
target clean does not have prerequisites.
A rule, then, explains how and when to remake certain files
which are the targets of the particular rule. make carries out
the commands on the prerequisites to create or update the target. A
rule can also explain how and when to carry out an action.
A makefile may contain other text besides rules, but a simple makefile need only contain rules. Rules may look somewhat more complicated than shown in this template, but all fit the pattern more or less.